![]() It has been reported that the channel mobility of the 4H-SiC MISFET can be enhanced by using an ultra-thin SiO 2 interfacial layer and Al 2O 3 grown by atomic layer deposition (ALD). Therefore, it is important to explore effective techniques to reduce the trap density at SiO 2/SiC (0001) interface.Īlternatively, deposited oxides have been investigated to improve the interface quality of 4H-SiC (0001) metal-insulator-semiconductor (MIS) devices in the past decade. 19,20 However, MISFETs based on these wafer orientations suffer from threshold voltage instability 19 and low critical field strength 21,22 issues. 18 On the other hand, the trap density at SiO 2/SiC interface with other crystal orientations, such as ( 000 1 ¯) and ( 11 2 ¯ 0), has been reported to exhibit lower values. Yet, the carrier mobility in SiC transistors remains limited (typically less than 50 cm 2/V s). 11,12 Post-oxidation annealing (POA) in nitrogen (N)-based ambient, such as nitrogen (N 2), 13 nitric oxide (NO), 14,15 and nitrous oxide (N 2O), 16,17 can passivate the defects by removing the accumulated C clusters, thus providing better interface quality and improving the channel mobility of SiC MISFETs. 7–10 Defects generated during the thermal oxidation process, such as complex carbon (C) clusters, residual C, and dangling bonds at the SiO 2/SiC interface, are believed to be the possible root causes of the poor interface quality. However, the high trap density at the thermal-SiO 2/SiC interface, especially on the (0001) crystal plane, can severely degrade the channel mobility and device reliability of SiC MISFETs. 1 Compared to other wide bandgap semiconductors, such as GaN 2,3 and diamond, 4,5 SiC has several advantages, including high thermal conductivity, high breakdown field, 6 the ability to grow a thermal oxide to serve as gate dielectrics, and the availability of large-scale high-quality substrates. Silicon carbide (SiC) is a wide bandgap material that shows great promise in high-power and high-temperature applications.
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